Materials challenges in three-dimensional integrated circuits
نویسندگان
چکیده
منابع مشابه
Three-dimensional integrated circuits
integrated circuits A. W. Topol D. C. La Tulipe, Jr. L. Shi D. J. Frank K. Bernstein S. E. Steen A. Kumar G. U. Singco A. M. Young K. W. Guarini M. Ieong Three-dimensional (3D) integrated circuits (ICs), which contain multiple layers of active devices, have the potential to dramatically enhance chip performance, functionality, and device packing density. They also provide for microchip architec...
متن کاملData bus swizzling in TSV-based three-dimensional integrated circuits
The purpose of this paper is to efficiently exploit swizzling in reducing coupling noise between the bit lines of a TSV-based data bus in three-dimensional integrated circuits. The core concept of swizzling is to distribute the noise of an aggressor to all victims, rather than concentrating on the nearest victim. Based on this principle, an optimal swizzling pattern, which achieves an equal dis...
متن کاملThree-Dimensional Integrated Circuits: Performance, Design Methodology, and CAD Tools
Three-dimensional integration technologies have been proposed in order to mitigate design challenges posed by deep-submicron interconnect. By providing multiple layers of active devices together with high-density local interconnects between these layers, 3-D technologies give digitalcircuit designers greater freedom in meeting power and delay budgets that are increasingly interconnect-dominated...
متن کاملVertically integrated, three-dimensional nanowire complementary metal-oxide-semiconductor circuits.
Three-dimensional (3D), multi-transistor-layer, integrated circuits represent an important technological pursuit promising advantages in integration density, operation speed, and power consumption compared with 2D circuits. We report fully functional, 3D integrated complementary metal-oxide-semiconductor (CMOS) circuits based on separate interconnected layers of high-mobility n-type indium arse...
متن کاملFabrication Technologies for Three-Dimensional Integrated Circuits (invited)
The MIT approach to 3-D VLSI integration is based on low-temperature Cu-Cu wafer bonding. Device wafers are bonded in a face-to-back manner, with short vertical vias and Cu-Cu pads as the inter-wafer throughway. In our scheme, there are several reliability criteria, which include: a) Structural integrity of the Cu-Cu bond, b) CuCu contact electrical characteristics, and c) Process flow efficien...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: MRS Bulletin
سال: 2015
ISSN: 0883-7694,1938-1425
DOI: 10.1557/mrs.2015.8